From 56c3c61e3082f84fdafcab6cf24f60c4994b7496 Mon Sep 17 00:00:00 2001
From: JaeYoo-Im <cpu3792@gmail.com>
Date: Mon, 13 Jun 2022 11:00:23 +0900
Subject: [PATCH] Emacs : some verilog snippets

---
 .../verilog-mode/always (asynchronous rst)    | 14 +++++++++++++
 .../verilog-mode/always (asynchronous rstn)   | 14 +++++++++++++
 .../verilog-mode/always (synchronous rst)     | 14 +++++++++++++
 .../verilog-mode/always (synchronous rstn)    | 14 +++++++++++++
 .doom.d/snippets/verilog-mode/module(base)    | 21 +++++++++++++++++++
 5 files changed, 77 insertions(+)
 create mode 100644 .doom.d/snippets/verilog-mode/always (asynchronous rst)
 create mode 100644 .doom.d/snippets/verilog-mode/always (asynchronous rstn)
 create mode 100644 .doom.d/snippets/verilog-mode/always (synchronous rst)
 create mode 100644 .doom.d/snippets/verilog-mode/always (synchronous rstn)
 create mode 100644 .doom.d/snippets/verilog-mode/module(base)

diff --git a/.doom.d/snippets/verilog-mode/always (asynchronous rst) b/.doom.d/snippets/verilog-mode/always (asynchronous rst)
new file mode 100644
index 0000000..dcc5120
--- /dev/null
+++ b/.doom.d/snippets/verilog-mode/always (asynchronous rst)	
@@ -0,0 +1,14 @@
+# -*- mode: snippet -*-
+# name: always (asynchronous rst)
+# uuid:
+# key: trigger-key
+# condition: t
+# --
+
+always@(posedge clk or posedge rst)
+if(rst) begin
+/*AUTORESET*/
+end
+else begin
+end
+end
\ No newline at end of file
diff --git a/.doom.d/snippets/verilog-mode/always (asynchronous rstn) b/.doom.d/snippets/verilog-mode/always (asynchronous rstn)
new file mode 100644
index 0000000..dd41bd1
--- /dev/null
+++ b/.doom.d/snippets/verilog-mode/always (asynchronous rstn)	
@@ -0,0 +1,14 @@
+# -*- mode: snippet -*-
+# name: always (asynchronous rstn)
+# uuid:
+# key: trigger-key
+# condition: t
+# --
+
+always@(posedge clk or negedge rstn)
+if(!rstn) begin
+/*AUTORESET*/
+end
+else begin
+end
+end
\ No newline at end of file
diff --git a/.doom.d/snippets/verilog-mode/always (synchronous rst) b/.doom.d/snippets/verilog-mode/always (synchronous rst)
new file mode 100644
index 0000000..a9d5a05
--- /dev/null
+++ b/.doom.d/snippets/verilog-mode/always (synchronous rst)	
@@ -0,0 +1,14 @@
+# -*- mode: snippet -*-
+# name: always (synchronous rst)
+# uuid:
+# key: trigger-key
+# condition: t
+# --
+
+always@(posedge clk)
+if(rst) begin
+/*AUTORESET*/
+end
+else begin
+end
+end
\ No newline at end of file
diff --git a/.doom.d/snippets/verilog-mode/always (synchronous rstn) b/.doom.d/snippets/verilog-mode/always (synchronous rstn)
new file mode 100644
index 0000000..1026e5a
--- /dev/null
+++ b/.doom.d/snippets/verilog-mode/always (synchronous rstn)	
@@ -0,0 +1,14 @@
+# -*- mode: snippet -*-
+# name: always (synchronous rstn)
+# uuid:
+# key: trigger-key
+# condition: t
+# --
+
+always@(posedge clk)
+if(!rstn) begin
+/*AUTORESET*/
+end
+else begin
+end
+end
\ No newline at end of file
diff --git a/.doom.d/snippets/verilog-mode/module(base) b/.doom.d/snippets/verilog-mode/module(base)
new file mode 100644
index 0000000..7dc4c54
--- /dev/null
+++ b/.doom.d/snippets/verilog-mode/module(base)
@@ -0,0 +1,21 @@
+# -*- mode: snippet -*-
+# name: module(base)
+# uuid:
+# key: trigger-key
+# condition: t
+# --
+
+module example
+#(
+parameter DIN_LEN = 8
+)
+(/*AUTOARG*/);
+
+/*AUTOINPUT*/
+/*AUTOOUTPUT*/
+
+/*AUTOWIRE*/
+/*AUTOREG*/
+
+
+endmodule
\ No newline at end of file